Logic Component
General logic unit with AND OR capabilities
Vars | |
input_port | The input port |
---|---|
result | The result from the output |
Var Details
input_port
The input port
result
The result from the output
General logic unit with AND OR capabilities
Vars | |
input_port | The input port |
---|---|
result | The result from the output |
The input port
The result from the output